In the manufacture of semiconductors, many individual semiconductor devices are formed on a single semiconductor wafer. FIG. 1 provides an illustration of a circular semiconductor wafer 100 that includes a plurality of rectangular individual semiconductor devices. Each individual semiconductor device 200 on the semiconductor wafer 100 generally includes a series of individual bond pads along the outside perimeter of each individual semiconductor device. FIG. 2 provides an enhanced illustration of one of the individual semiconductor devices on the semiconductor wafer. FIG. 3 shows the series of individual bond pads along the outside perimeter of the individual semiconductor device. The individual bond pads are shown as the series of white squares along the outside perimeter of the individual semiconductor device.
Spaces, which are referred to as “scribe lanes,” are provided between the individual semiconductor devices on the semiconductor wafer. Any one singular space is referred to as a “scribe lane.” Scribe lanes generally represent unused space on the semiconductor wafer. Thus, the size of the scribe lanes is generally kept to a minimal size so that a maximum number of individual semiconductor devices may be included in each semiconductor wafer. FIG. 4 provides an illustration of “scribe lanes,” which includes an identification of both vertical scribe lanes 401 and horizontal scribe lanes 402. The “scribe lanes” are destroyed when the individual semiconductor devices 200 are separated from each other when the semiconductor wafer 100 undergoes “singulation.” Singulation is a cutting process that separates the individual semiconductor devices from each other by cutting the semiconductor wafer 100 along the “scribe lanes.” The singulation cutting process is generally performed by either a diamond tipped saw blade or a laser cutter.
The one conventional exception to the scribe lane being an unused space on the semiconductor wafer is in the circumstance when the semiconductor wafer fabrication facility places test structures in selected scribe lanes. These test structures are used to collect data that is used to monitor the testing and to verify compliance of the fabrication facility's fabrication equipment, testing systems, and testing processes with established fabrication and testing parameters. Typically, there are five test structures placed in scribe lanes in a semiconductor wafer, which are generally located near the center of the semiconductor wafer and in each of the four quadrants of the semiconductor wafer.
An illustration of an integrated circuit package 500 showing how the various bond pads are connected to an integrated circuit in an individual semiconductor device is provided in FIG. 5A. In FIG. 5A, the integrated circuit 501 is connected through gold bond wires 502 to the bond pads. The bond pads are located in an area identified as an integrated circuit package lead frame 503. The integrated circuit package lead frame 503 includes pins and their contacts that allow the integrated circuit 501 to connect to a printed circuit board in which it is placed. FIG. 5B provides an illustration of how the bond wires 502 attach to the integrated circuit 501, e.g., printed circuit board 506. As shown in FIG. 5B, the integrated circuit package 500 including a die 505 attached to bonding wire 502 that attaches to the IC package lead frame 503. The primary composition of the non-conductive material in the integrated circuit package 500 is a resin mould 507.
The individual semiconductor devices are generally subjected to a series of automated tests by a semiconductor testing device while they are attached to one another in the semiconductor wafer. After the automated testing of the semiconductor wafer is completed, the semiconductor wafer is subjected to being cut by an automated cutting device, which frequently includes a diamond saw blade or a laser cutting tool. The automated cutting device separates the many individual semiconductor devices from one another by cutting the semiconductor wafer along the various scribe lanes, which are destroyed in the cutting process.
A semiconductor wafer probe is a device that is used in the process of testing the individual semiconductor devices that are arrayed on the semiconductor wafer. An illustration of a semiconductor wafer test system 600, using a semiconductor wafer probe 601, is illustrated in FIG. 6A and FIG. 6B. In FIG. 6A, a semiconductor wafer test system is shown that includes a large scale integrated circuit tester 602 that includes a main frame 603 having at least one programmed computer, storage devices, and input/output circuitry. The LSI tester 602 is connected by a cable 604 to a semiconductor wafer probe 601 that includes a test head 605 and a wafer handling unit 607. The test head 605 includes a probe card 607 that is connected to a performance board 608 using a spring-contact 609. The semiconductor wafer 610 being tested is placed on a wafer chuck 611, permitting the probe card to contact the semiconductor wafer 610 for testing. The test head has associated controllers to permit movement in the x, y, and z directions, as well as an angle of inclination Θ so that the probe card 607 is properly aligned with the semiconductor wafer 610 being tested. FIG. 6B shows a more detailed illustration of the probe card 607 including a ceramic ring 612 and a probe needle 608 that comes into contact with a designated normal bond pad 201 for an individual semiconductor device 200, such as an LSI chip 613.
The technological problem that arises in the semiconductor wafer probe testing process is the damage that occurs to the normal individual bonds pads 201 from coming into contact with a probe needle 608 of the wafer probe 601. Each time an individual semiconductor device 200 is probed, physical damage is caused to each normal individual bond pad 201 that is probed. The damage caused by the semiconductor wafer probe 601 to one or more normal individual bond pads 201 can cause both electrical failure and/or mechanical failure, resulting in the related individual semiconductor device 200 to function improperly or fail completely. Common electrical failures include short circuits and broken circuits. Common mechanical failures include bond wire attachment problems, and significant decreases in long-term reliability due, such as from corrosion and/or contamination.